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91400 rm (im) ho-1/18 ver.1.04 22698 preliminary overview the LC573904 is a cmos 4-bit microcontroller that operates on low voltage and very low power consumption. it also contains 4k-byte rom, 128 4 bits ram, lcd drivers and melody function. features (1) rom :4096 8 bits (2) ram :128 4 bits (3) cycle time cycle time oscillation source oscillation frequency power supply voltage power source 122 s crystal oscillation 32.768khz 27 s rc oscillation 150khz 1.20 - 1.65v ag battery 122 s crystal oscillation 32.768khz 27 s rc oscillation 150khz 2.50 - 3.60v li battery 122 s crystal oscillation 32.768khz 8 s rc oscillation 500khz 2.00 - 6.00v external voltage supply (4) input / output terminals - input ports : 4 terminals (s-port : 4 terminals) - input / output ports : 8 terminals (p0 port : 4 terminals, p1 port : 4 terminals) [notes] when using the p1 port for output, the ?l? level hold tr. of p1 should be off. if p1 port becomes ?h? level with ?l? level hold tr. on, it causes the through current from vdd to gnd and increases the current consumption. - output ports : 2 terminals (buzzer / melody output terminal : 1 terminal, general output port : 1 terminal) - lcd segment output ports : 32 terminals (possible to use output port by mask option) - lcd common output ports : 4 terminals 4-bit microcontrolle r with 4k-byte rom, 120 4bits ram and lcd driver LC573904 ordering number : enn*6725 cmos ic
LC573904 2/18 (5) lcd driver drivable lcd panel number of drivable lcd segment output 1/2 bias 1/4 duty 128 segments 1/2 bias 1/3 duty 96 segments 1/2 bias 1/2 duty 64 segments static 32 segments (possible to use output port by mask option.) - built-in step-up / step-down circuit (6) melody/buzzer - melody function octave : 3 octaves time of musical note : specified by program - buzzer output (7) base timer - 15-bit base timer for timekeeping (8) halt release - five vectors 1. 15-bit base timer (500ms overflow output) 2. 15-bit base timer (output every 32ms) 3. s-port 4. p1-port 5. 1/10 second pulse (9) stand-by mode - halt mode the program operation will be stopped in this mode. this mode is released by system reset and 5 vectors for halt release above-mentioned. (10) system reset - res terminal - reset by setting s1 to s4 terminals to ?h? level simultaneously. (11) oscillation - two oscillation circuits - 32.768khz crystal oscillation / rc oscillation (12) power supply - ag-battery : vdd1-vss=1.20v to 1.65v, step-up voltage (vdd2-vss=2.4v to 3.3v) - li-battery : vdd2-vss=2.50v to 3.60v, step-down voltage (vdd1-vss=1.25v to 1.8v) - external voltage supply : vdd2-vss=2.00v to 6.00v, step-down voltage (vdd1-vss=1.3v to 3.0v) (13) shipping form - bare chip, qfp64 (14) the development tool - evaluation chip : lc5797 - emulator : eva520 + tb5739 + dcb-1a
LC573904 3/18 pad assignment chip size (x y) : 2.63mm 2.89mm chip thickness : 480 m pad size : 116 m 116m note: when a lithium battery has been selected as the power supply, please note the following points. there are two modes of use for the lithium battery: backup mode and normal mode (backup flag off). in backup mode, the battery potential is applied directly to the oscillation circuit, whereas in normal mode only half the battery potential is app lied. because of the different voltage applied to the oscillation circuit in each mode, there may be a difference in the generated oscillation frequency. when entering backup mode a corresponding error will arise. if timing accuracy is required (for clocks, etc), please bear in mind the above in the program design. seg1 com2 test rcout rcin vss oscout oscin res s1 s2 32hz t3 cup2 cup1 com1 seg32 light alm vdd2 vdd1 bak s4 s3 p10 p11 p12 p13 p00 p01 p02 p03 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 61 62 63 64 1 2 3 4 5 6 7 8 9 10 11 x y com3 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 com3 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 seg26 seg27 seg28 seg29 seg30 seg31 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
LC573904 4/18 pad name and coordinates coordinates coordinates qfp64 pin no. pad no. pad name x m y m qfp64 pin no. pad no. pad name x m y m 5 1 bak -1065 645 37 33 32hz 1065 -505 6 2 s4 -1065 455 38 34 s2 1065 -380 7 3 s3 -1065 330 39 35 s1 1065 -255 8 4 p10 -1065 170 40 36 res 1065 -130 9 5 p11 -1065 5 41 37 oscin 1065 -5 10 6 p12 -1065 -155 42 38 oscout 1065 115 11 7 p13 -1065 -315 43 39 vss 1065 300 12 8 p00 -1065 -475 44 40 rcin 1065 490 13 9 p01 -1065 -635 45 41 rcout 1065 615 14 10 p02 -1065 -800 46 42 test 1065 740 15 11 p03 -1065 -960 47 43 com2 1065 865 16 12 com4 -1080 -1205 48 44 seg1 1065 1005 17 13 seg17 -940 -1205 49 45 seg2 1075 1205 18 14 seg18 -790 -1205 50 46 seg3 935 1205 19 15 seg19 -650 -1205 51 47 seg4 810 1205 20 16 seg20 -525 -1205 52 48 seg5 685 1205 21 17 seg21 -400 -1205 53 49 seg6 560 1205 22 18 seg22 -275 -1205 54 50 seg7 435 1205 23 19 seg23 -150 -1205 55 51 seg8 310 1205 24 20 seg24 -25 -1205 56 52 seg9 185 1205 25 21 seg25 100 -1205 57 53 seg10 60 1205 26 22 seg26 225 -1205 58 54 seg11 -65 1205 27 23 seg27 350 -1205 59 55 seg12 -190 1205 28 24 seg28 475 -1205 60 56 seg13 -315 1205 29 25 seg29 600 -1205 61 57 seg14 -440 1205 30 26 seg30 725 -1205 62 58 seg15 -565 1205 31 27 seg31 865 -1205 63 59 seg16 -705 1205 32 28 seg32 1065 -1185 64 60 com3 -855 1205 33 29 com1 1065 -1035 1 61 light -1065 1195 34 30 cup1 1065 -895 2 62 alm -1065 1070 35 31 cup2 1065 -770 3 63 vdd2 -1065 895 36 32 t3 1065 -630 4 64 vdd1 -1065 770 the pad coordinates are such that the chip center is taken as the origin and the values for (x, y) represent the coordinates of the center point of each pad. substrate must be connected to vss or left open.
LC573904 5/18 package dimension (unit : mm) 3159 sanyo : qip-64e pin assignment qip64e seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 seg14 seg15 seg16 com3 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg1 com2 test rcout rcin vss oscout oscin res s1 s2 32hz t3 cup2 cup1 com1 ligh t alm vdd2 vdd1 ba k s4 s3 p10 p11 p12 p13 p00 p01 p02 p03 com4 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
LC573904 6/18 system block diagram halt mode control stand-by control control circuit x?tal rc clock generator base timer chronograph counter melody/buzzer circuit strove pointer segment pla lcd driver s port ir pla rom pc stack ac tmp alu dpl dph ram p0 port p1 port
LC573904 7/18 sample application circuit (1) ag battery used application (2) li battery used application (1/2 bias 1/4 duty) (1/2 bias 1/4 duty) (power supply : ag battery version) (power supply : li battery version) (3) ext-v used application (1/2 bias 1/4 duty) (power supply : ext-v version) note 1) if p0, p1 port or segment output (seg17 to seg32) are used for key scan output port, p-ch open drain option should be used in order to prohibit signal short between output ports when two or more keys are pushed simultaneously. note 2) if p1 port is used as output port, the following setting is necessary. programmable pull-down resistors which is one of the internal pull-down register should be set to open mode with the spdr instruction. lcd glass 1/2 bias 1/4 duty com1 com2 com3 com4 segout key matrix 32.768khz 0.1 f vdd2 vdd1 vss cup1 cup2 alm 0.1 f 0.1 f p10 p11 p12 p13 s1 s2 oscin oscout res 3.0v p00 p01 p02 p03 s3 s4 light rcin rcout 0.1 f bak lcd glass 1/2 bias 1/4 duty com1 com2 com3 com4 seg1-32 key matrix 32.768khz 0.1 f vdd1 vss vdd2 cup1 cup2 alm 0.1 f 0.1 f p10 p11 p12 p13 s1 s2 oscin oscout res p00 p01 p02 p03 s3 s4 light rcin rcout 1.5v(ag) lcd glass 1/2 bias 1/4 duty com1 com2 com3 com4 seg1-32 key matrix 32.768khz 0.1 f vdd2 vdd1 vss cup1 cup2 alm 0.1 f 0.1 f p10 p11 p12 p13 s1 s2 oscin oscout res 3.0v p00 p01 p02 p03 s3 s4 light rcin rcout
LC573904 8/18 LC573904 terminal description name pin no. pad no. i/o function description option vss 43 39 - power terminal (-) vdd1 9 64 - power terminal(+) (ag battery version) voltage supply to lcd driver (li battery version, extv version) (c is connected between vdd1 and vss.) voltage supply to logic unit (ag battery version, when back up flag is off in li battery option.) battery version ag/li/ext-v vdd2 3 63 - power terminal(+) (li battery version, extv version) voltage supply to lcd driver (ag battery version) (c is connected between vdd2 and vss.) voltage supply to logic unit (extv version, when back up flag is on in li battery option.) battery version ag/li/ext-v bak 5 1 - power terminal(+) capacitor is required between bak and vss in order to prevent the malfunction of the logic circuit in li battery option. cup1,2 34 35 30 31 - capacitor connecting terminals for step-up (or stop down) s port s1-s4 39 38 7 6 35 34 3 2 i 4-bit input port input for halt release lsi system is reset by applying vdd to s1 to s4 simultaneously. programmable pull-down resistor ?l?-level hold tr. ?l?-level hold tr. provided/not provided p1 port p10-p13 8-11 4-7 i/o 4-bit input/output port cmos output/p-ch open drain output input for halt release programmable pull-down resistor ?l?-level hold tr. ?h?-level hold tr. ?l?-level hold tr. provided/not provided ?h?-level hold tr. provided/not provided output form cmos /p-ch open drain p0 port p00-p03 12-15 8-11 i/o 4-bit input/output port cmos output/p-ch open drain output ?h?-level hold tr. ?h?-level hold tr. provided/not provided output form cmos /p-ch open drain light 1 61 o output port alm 2 62 o output port output terminal to deliver melody signal or buzzer with sas or tmel instruction. (buzzer : 4khz/2khz/1khz modulation signal or non modulation signal.)* (melody signal : 3 octaves) seg1 -seg32 48-63 17-32 44-59 13-28 o lcd output terminals for segment possible to use output port for seg17 to seg32 (pad no.13 to 28) by mask option. output form segment/cmos/p- ch open drain segment data sp=0 - fh dbus=a/b/c/d/e/f /g/h continue.
LC573904 9/18 name pin no. pad no. i/o function description option com1 -com4 33 47 64 16 29 43 60 12 o lcd output terminals for common lcd duty 1/1,1/2,1/3,1/4 oscin 41 37 i input for 32.768khz crystal oscillation oscout 42 38 o output for 32.768khz crystal oscillation rcin 44 40 i input for rc oscillation r is connected across rcin and rcout, and c is connected across rcin and vss. rcout 45 41 o output for rc oscillation r is connected across rcin and rcout. res 40 36 i reset 32hz 37 33 - test terminal this terminal should be left unconnected. t3 36 32 - test terminal this terminal should be left unconnected. test 46 42 - test terminal this terminal should be left unconnected. * 4khz/2khz/1khz : for 32.768khz crystal oscillation, proportional to oscillation frequency.
LC573904 10/18 ag battery version 1. absolute maximum ratings at ta=252 c, vss=0v parameter symbol pin & conditions ratings unit vdd1 -0.3 to +4.0 supply voltage vdd2 -0.3 to +4.0 input voltage vin s1-s4, p00-p03, p10-p13, test, oscin, res, rcin -0.3 to vdd1+0.3 vout1 cup2, oscout, alm, light, p00-p03, p10-p13, rcout -0.3 to vdd1+0.3 output voltage vout2 seg1-seg32, com1-com4, cup1 -0.3 to vdd2+0.3 v iout1 alm 4 iout2 light 1 ma peak output current (at each pins) iout3 output except alm and light 500 a total output current iall total output pins. 10 ma maximum power dissipation pdmax qfp64 430 mw operating temperature range topr -30 to +70 storage temperature range tstg -40 to +125 c 2. recommended operating range at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit vdd1 1.30 1.65 operating supply voltage vdd2 2.4 3.3 input high voltage vih s1-s4, res, p00-p03, p10-p13 vdd1-0.2 vdd1 input low voltage vil s1-s4, res, p00-p03, p10-p13 0 0.2 v fopg1 32.768khz (crystal oscillation) vdd1=1.20 - 1.65v (ta=25 c) refer to figure 1 32 32.768 33 oscillation frequency range fopg2 rc oscillation vdd1=1.20 - 1.65v (ta=25 c) refer to figure 2 30 100 khz
LC573904 11/18 3. electrical characteristics at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit rin1a vdd1=1.55v, vil=0.2v, low level hold tr. fig.3 *1 150 300 1000 rin1b vdd1=1.55v, low level pull in tr. fig.3 *1 100 300 500 pull-down transistor rin3 vdd1=1.55v, test, res 10 300 pull-up transistor rin2 vdd1=1.55v, high level hold tr. fig.6 *5 100 400 2000 k ? output high voltage voh1 vdd1=1.55v, ioh=-0.4 a *2 vdd2-0.2 output low voltage vol1 vdd1=1.55v, iol=0.4 a *2 0.2 output high voltage voh2 vdd1=1.55v, ioh=-4 a, com1-4 vdd2-0.2 output middle voltage vom vdd1=1.55v, ioh=-4 a, iol=4 a, com1-4 vdd1-0.2 vdd1+0.2 output low voltage vol2 vdd1=1.55v, iol=4 a, com1-4 0.2 output high voltage voh3 vdd1=1.35v, ioh=-250 a, alm, light vdd1-0.6 5 output low voltage vol3 vdd1=1.35v, iol=150 a, alm, light 0.6 output high voltage voh4 vdd1=1.55v, ioh=-20 a *3 vdd1-0.2 output low voltage vol4 vdd1=1.55v, iol=20 a *4 0.2 v output high current ioh vdd1=1.55v, voh=vdd1 0.5 *5 -100 output low current iol vdd1=1.55v, vol=vdd1 0.5 *6 100 a step-up voltage vdd2 vdd1=1.35v, c1=c2=0.1 f, fopg=32.768khz, fig.4 2.5 2.7 v idd1 rc osc stop 1.0 4.0 current dissipation (in halt mode) idd2 vdd1=1.55v, c1=c2=0.1 f, fig.4, cg=16pf, crystal osc(ci 25k ? ), rc osc(rext=470 k ? , cext=18pf), back-up flag off, ta 50 c rc osc operating 5.0 15.0 idd3 rc osc stop 3.0 12.0 current dissipation (in operating mode) idd4 vdd1=1.55v, c1=c2=0.1 f, fig.4, cg=16pf, crystal osc(ci 25k ? ), rc osc(rext=470 k ? , cext=18pf), back-up flag off, ta 50 c rc osc operating 7.0 20.0 a oscillator start-up voltage vstt 1.35 oscillator sustaining voltage vhold cg=16pf, crystal osc(ci 25k ? ), back-up flag on, ta=25 c, fig.5 1.30 v oscillator start-up time tstt vdd1=1.35v cg=16pf, crystal osc(ci 25k ? ), back-up flag on, ta=25 c, fig.5 10 s
LC573904 12/18 li battery version 1. absolute maximum ratings at ta=252 c, vss=0v parameter symbol pin & conditions ratings unit vdd1 -0.3 to +4.0 supply voltage vdd2 -0.3 to +4.0 vin1 oscin, rcin -0.3 to vdd1+0.3 input voltage vin2 s1-s4, p00-p03, p10-p13, test, res -0.3 to vdd2+0.3 vout1 cup2, oscout, rcout -0.3 to vdd1+0.3 output voltage vout2 segout, com1-com4, cup1, alm, light, p00-p03, p10-p13 -0.3 to vdd2+0.3 v iout1 alm 4 iout2 light 1 ma peak output current (at each pins) iout3 output except alm1 and light 500 a total output current iall the total all pins. 10 ma maximum power dissipation pdmax qfp64 430 mw operating temperature range topr -30 to +70 storage temperature range tstg -40 to +125 c 2. recommended operating range at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit vdd1 1.25 3.60 operating supply voltage vdd2 2.5 3.6 input high voltage vih s1-s4, res, p00-p03, p10-p13 vdd2-0.4 vdd2 input low voltage vil s1-s4, res, p00-p03, p10-p13 0 0.4 v fopg1 32.768khz (crystal oscillation) vdd2=2.5 - 3.6v (ta=25 c) refer to figure 1 32 32.768 33 oscillation frequency range fopg2 rc oscillation vdd2=2.5 - 3.6v (ta=25 c) refer to figure 2 30 150 khz
LC573904 13/18 3. electrical characteristics at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit rin1a vdd2=2.9v, vil=0.4v, low level hold tr. fig.3 *1 150 300 1000 rin1b vdd2=2.9v, low level pull in tr. fig.3 *1 60 150 300 pull-down transistor rin2 vdd2=2.9v, test, res 10 300 pull-up transistor rin3 vdd2=2.9v, high level hold tr. fig.9 *5 200 600 2000 k ? output high voltage voh1 vdd2=2.9v, ioh=-0.4 a *2 vdd2-0.2 output low voltage vol1 vdd2=2.9v, iol=0.4 a *2 0.2 output high voltage voh2 vdd2=2.9v, ioh=-4 a, com1-4 vdd2-0.2 output middle voltage vom vdd2=2.9v, ioh=-4 a, iol=4 a, com1-4 vdd2/2 -0.2 vdd2/2 +0.2 output low voltage vol2 vdd2=2.9v, iol=4 a, com1-4 0.2 output high voltage voh3 vdd2=2.4v, ioh=-250 a, alm vdd2-0.6 5 output low voltage vol3 vdd2=2.4v, iol=250 a, alm 0.65 output high voltage voh4 vdd2=2.4v, ioh=-150 a, light vdd2-1.5 output low voltage vol4 vdd2=2.4v, iol=150 a, light 1.5 output high voltage voh5 vdd2=2.9v, ioh=-40 a *3 vdd2-0.4 output low voltage vol5 vdd2=2.9v, iol=40 a *4 0.4 v output high current ioh vdd2=2.9v, voh=vdd2-0.45v *5 -450 output low current iol vdd2=2.9v, vol=0.45v *6 450 a step-down voltage vdd1 vdd2=2.8v, c1=c2=0.1 f, fopg=32.768khz, fig.7 1.35 v idd1 rc osc stop 0.8 2.0 current dissipation (in halt mode) idd2 vdd2=2.9v, c1=c2=0.1 f, fig.7, cg=16pf, crystal osc(ci 25k ? ), back-up flag off, rc osc(rext=470 k ? , cext=18pf), ta 50 c rc osc operating 5 15.0 idd3 rc osc stop 3 12.0 current dissipation (in operating mode) idd4 vdd2=2.9v, c1=c2=0.1 f, fig.7, cg=16pf, crystal osc(ci 25k ? ), back-up flag off, rc osc(rext=470 k ? , cext=18pf), ta 50 c rc osc operating 7 20.0 a oscillator start-up voltage vstt cg=16pf, crystal osc(ci 25k ? ), back-up flag on, ta=25c, fig.8 2.60 v oscillator sustaining voltage vhold cg=16pf, crystal osc(ci 25k ? ), back-up flag off, ta=25 c, fig.8 1.25 oscillator start-up time tstt vdd2=2.0v cg=16pf, crystal osc(ci 25k ? ), ta=25 c, fig.8 10 s
LC573904 14/18 ext-v version 1. absolute maximum ratings at ta=252 c, vss=0v parameter symbol pin & conditions ratings unit vdd1 -0.3 to +7.0 supply voltage vdd2 -0.3 to +7.0 input voltage vin s1-s4, p00-p03, p10-p13, test, res, oscin, rcin -0.3 to vdd2+0.3 output voltage vout seg1-seg32, com1-com4, cup1, cup2, oscout, alm, light, rcout -0.3 to vdd2+0.3 v iout1 alm 4 iout2 light 1 ma peak output current (at each pins) iout3 output except alm and light 500 a total output current iall the total all pins. 10 ma maximum power dissipation pdmax qfp64 430 mw operating temperature range topr -30 to +70 storage temperature range tstg -40 to +125 c 2. recommended operating range at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit vdd1 1.3 3.0 operating supply voltage vdd2 2.0 6.0 input high voltage vih s1-s4, res, p00-p03, p10-p13 vdd2-0.4 vdd2 input low voltage vil s1-s4, res, p00-p03, p10-p13 0 0.4 v fopg1 32.768khz (crystal oscillation) vdd2=2.0 - 6.0v refer to figure 1 32 32.768 33 oscillation frequency range fopg2 rc oscillation vdd2=2.0 - 6.0v (ta=25 c) refer to figure 2 30 500 khz
LC573904 15/18 3. electrical characteristics at ta=-30 c to + 70 c, vss=0v ratings parameter symbol conditions min. typ. max. unit rin1a vdd2=2.9v, vil=0.4v, low level hold tr. fig.3 *1 150 300 1000 rin1b vdd2=2.9v, low level pull in tr. fig.3 *1 60 150 300 pull-down transistor rin2 vdd2=2.9v, test, res 10 300 pull-up transistor rin3 vdd2=2.9v, high level hold tr. fig.9 *5 200 600 2000 k ? output high voltage voh1 vdd2=2.9v, ioh=-0.4 a *2 vdd2-0.2 output low voltage vol1 vdd2=2.9v, iol=0.4 a *2 0.2 output high voltage voh2 vdd2=2.9v, ioh=-4 a, com1-4 vdd2-0.2 output middle voltage vom vdd2=2.9v, ioh=-4 a, iol=4 a, com1-4 vdd2/2 -0.2 vdd2/2 +0.2 output low voltage vol2 vdd2=2.9v, iol=4 a, com1-4 0.2 output high voltage voh3 vdd2=2.4v, ioh=-250 a, alm vdd2-0.6 5 output low voltage vol3 vdd2=2.4v, iol=250 a, alm 0.65 output high voltage voh4 vdd2=2.4v, ioh=-150 a, light vdd2-1.5 output low voltage vol4 vdd2=2.4v, iol=150 a, light 1.5 output high voltage voh5 vdd2=2.9v, ioh=-40 a *3 vdd2-0.4 output low voltage vol5 vdd2=2.9v, iol=40 a *4 0.4 v output high current ioh vdd2=2.9v, voh=vdd2-0.45v *5 -450 output low current iol vdd2=2.9v, vol=0.45v *6 450 a step-down voltage vdd1 vdd2=2.8v, c1=c2=0.1 f, fopg=32.768khz, fig.7 1.35 v idd1 rc osc stop 5.0 15.0 current dissipation (in halt mode) idd2 vdd2=2.9v, c1=c2=0.1 f, fig.7, cg=15pf, crystal osc(ci 25k ? ), rc osc(rext=470 k ? , cext=18pf), ta 50 c rc osc operating 15 50 idd3 rc osc stop 10 40 current dissipation (in operating mode) idd4 vdd2=2.9v, c1=c2=0.1 f, fig.7, cg=15pf, crystal osc(ci 25k ? ), rc osc(rext=470 k ? , cext=18pf), ta 50 c rc osc operating 50 200 a oscillator start-up voltage vstt 2.0 oscillator sustaining voltage vhold cg=15pf, crystal osc(ci 25k ? ), ta=25 c, fig.8 2.0 v oscillator start-up time tstt vdd2=2.0v cg=15pf, crystal osc(ci 25k ? ), ta=25 c, fig.8 10 s
LC573904 16/18 electrical characteristics at ta=-30c to + 70c, vss=0v ratings parameter symbol conditions min. typ. max. unit rin1a vdd2=5.0v, vil=0.4v, low level hold tr. fig.3 *1 70 200 600 rin1b vdd2=5.0v, low level pull in tr. fig.3 *1 60 150 300 pull-down transistor rin2 vdd2=5.0v, test, res 10 300 pull-up transistor rin3 vdd2=5.0v, high level hold tr. fig.9 *5 100 400 1000 k ? output high voltage voh1 vdd2=5.0v, ioh=-0.4 a *2 vdd2-0.2 output low voltage vol1 vdd2=5.0v, iol=0.4 a *2 0.2 output high voltage voh2 vdd2=5.0v, ioh=-4 a, com1-4 vdd2-0.2 output middle voltage vom vdd2=5.0v, ioh=-4 ? a, iol=4 a, com1-4 vdd2/2 -0.2 vdd2/2 +0.2 output low voltage vol2 vdd2=5.0v, iol=4 a, com1-4 0.2 output high voltage voh3 vdd2=5.0v, ioh=-2.0ma, alm vdd2-1.0 output low voltage vol3 vdd2=5.0v, iol=2.0ma, alm 1.0 output high voltage voh4 vdd2=5.0v, ioh=-250 a, light vdd2-1.5 output low voltage vol4 vdd2=5.0v, iol=250 a, light 1.5 output high voltage voh5 vdd2=5.0v, ioh=-80 a *3 vdd2-0.8 output low voltage vol5 vdd2=5.0v, iol=80 a *4 0.8 v output high current ioh vdd2=5.0v, voh=vdd2-0.75v *5 -750 output low current iol vdd2=5.0v, vol=0.75v *6 750 a step-down voltage vdd1 vdd2=5.0v, c1=c2=0.1 f, fopg=32.768khz, fig.7 2.4 v idd1 rc osc stop to be determined current dissipation (in halt mode) idd2 vdd2=5.0v, c1=c2=0.1 f, fig.7, cg=15pf, crystal osc(ci 25k ? ), rc osc(rext=470k ? , cext=18pf), ta 50 c rc osc operating to be determined idd3 rc osc stop to be determined current dissipation (in operating mode) idd4 vdd2=5.0v, c1=c2=0.1 f, fig.7, cg=15pf, crystal osc(ci 25k ? ), rc osc(rext=470k ? , cext=18pf), ta 50 c rc osc operating to be determined a oscillator start-up voltage vstt 2.0 oscillator sustaining voltage vhold cg=15pf, crystal osc(ci 25k ? ), ta=25 c, fig.8 2.0 v oscillator start-up time tstt vdd2=2.0v, cg=15pf, crystal osc(ci 25k ? ), ta=25 c, fig.8 10 s *1 : s1, s2, s3, s4, p10 to p13 *2 : applied to seg1 to seg16 and lcd driver option terminals in seg17 to seg32. *3 : applied to the cmos or p-ch open drain terminals in seg17 to seg32. *4 : applied to the cmos terminals in seg17 to seg32. *5 : p00 to p03, p10 to p13 *6 : applied to the cmos terminals in p00 to p03, p10 to p13.
LC573904 17/18 crystal oscillation guaranteed constant a kind of oscillation producer oscillator cg citizen cfs-308 16pf (ag, li battery version) 15pf (ext-v version) 32.768khz crystal oscillation sii dt-vt-200 15pf *cg must be used j rank (5%) and ch characteristics. (note) please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. if you use other oscillators herein, we provide no guarantee for the characteristics. figure1 crystal oscillation circuit figure 2 rc oscillation circuit figure3 input configuration of figure 4 current dissipation, step-up voltage s1-4, p10-13 measurement figure5 oscillator start-up voltage, oscillator start- figure 6 input configuration of up time, oscillator sustaining voltage p00-03, p10-13 measurement oscin oscout cg vss cext vss rcin rcout rext vss program-applied 0.1 f cup1 cup2 vss oscin dut oscout vdd1 vdd2 cg 0.1 f rext cext rcin rcout cup2 vss oscin dut oscout vdd1 vdd2 cg rext cext rcin rcout vdd1
LC573904 18/18 figure7 current dissipation, step-down voltage figure 8 oscillator start-up voltage, oscillator measurement start-up time, oscillator sustaining voltage measurment figure9 input configuration p00-03, p10-13 [note] the specifications above are for a die mounted in a qfp64 type package. the specifications for a die is almost same as ones for a qfp type package basically. however, the operational characteristics may vary depending on the user?s assembling method. therefore, the operating temperature range for a die is specified only in ta=25 c2 c. 0.1 f cup1 cup2 vss oscin dut oscout vdd1 vdd2 cg 0.1 f 0.1 f bak rext cext rcin rcout cup2 vss oscin dut oscout bak vdd2 cg rext cext rcin rcout vdd1 vdd2 ps

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